7.12.1 [10] <7.5>
Consider the following three CPU organizations: CPU SS: A 2­core superscalar microprocessor that provides out­of­order issue  capabilities on 2 function units (FUs).  Only a single thread can run on each core  at a time. CPU MT: A fine­grained multithreaded processor that allows instructions from 2  threads to be run concurrently (i.e., there are two functional units), though only  instructions from a single thread can be issued on any cycle. CPU SMT: An SMT processor that allows instructions from 2 threads to be run  concurrently (i.e., there are two functional units), and instructions from either or  both threads can be issued to run on any cycle. Assume we have two threads X and Y to run on these CPUs that include the    following operations:

Assume all instructions take a single cycle to execute unless noted otherwise or they  encounter a hazard.

 Assume that you have 1 SS CPU. How many cycles will it take  to execute these two threads? How many issue slots are wasted due to hazards?
 
 
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